SMT-COMP 2025

The International Satisfiability Modulo Theories (SMT) Competition.

GitHub

SMT-COMP 2025

AUFDTLIRA (Unsat Core Track)

Competition results for the AUFDTLIRA logic in the Unsat Core Track. Chart

Results were generated on 2025-08-11

Benchmarks: 4930
Time Limit: 1200 seconds
Memory Limit: 30720 GB

Winners

Sequential PerformanceParallel PerformanceSAT Performance (parallel)UNSAT Performance (parallel)24 seconds Performance (parallel)
cvc5cvc5-cvc5cvc5

Sequential Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved UNSATUnsolvedAbstainedTimeoutMemout
cvc501928532287.712901.96492949291000
SMTInterpol016521829750.2319499.384168416876206860

Parallel Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved UNSATUnsolvedAbstainedTimeoutMemout
cvc501928532287.712901.96492949291000
SMTInterpol016521829750.2319499.384168416876206860

UNSAT Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved UNSATUnsolvedAbstainedTimeoutMemout
cvc501928532287.712901.96492949291000
SMTInterpol016521829750.2319499.384168416876206860

24 seconds Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved UNSATUnsolvedAbstainedTimeoutMemout
cvc50192564979.391592.174919491911000
SMTInterpol016025312417.135993.44408140812782200