The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the ALIA logic in the Incremental Track. Chart
Results were generated on 2025-08-11
Benchmarks: 24
Time Limit: 1200 seconds
Memory Limit: 30720 GB
| Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
|---|---|---|---|
| cvc5 | - | - | cvc5 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|
| cvc5 | 0 | 202550 | 255.24 | 255.24 | 0 | 24 | 0 | 0 | 0 |
| SMTInterpol | 0 | 202533 | 403.16 | 403.16 | 0 | 24 | 0 | 0 | 0 |
| UltimateEliminator+MathSAT | 0 | 154648 | 5363.07 | 5363.07 | 0 | 24 | 0 | 0 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|
| cvc5 | 0 | 188840 | 224.55 | 224.55 | 0 | 23 | 1 | 0 | 0 |
| SMTInterpol | 0 | 174856 | 328.70 | 328.70 | 0 | 22 | 2 | 0 | 0 |
| UltimateEliminator+MathSAT | 0 | 491 | 12.01 | 12.01 | 0 | 4 | 20 | 0 | 0 |