SMT-COMP

The International Satisfiability Modulo Theories (SMT) Competition.

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SMT-COMP 2023

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Model Validation Track
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QF_UFDT (Proof Exhibition Track)

Competition results for the QF_UFDT logic in the Proof Exhibition Track.

Page generated on 2023-07-06 16:06:18 +0000

Benchmarks: 100
Time Limit: 1200 seconds
Memory Limit: 60 GB

This track is experimental. Solvers are only ranked by performance, but no winner is selected.

Sequential Performance

Solver Error Score Correct Score CPU Time Score Wall Time ScoreUnsolvedTimeout Memout
SMTInterpol 0 18 18491.305 15487.9418290 0
cvc5 0 0 0.0 0.0100100 0
cvc5-lfsc 0 0 0.0 0.0100100 0

Parallel Performance

Solver Error Score Correct ScoreCPU Time ScoreWall Time ScoreUnsolvedTimeout Memout
SMTInterpol 0 1821197.71514005.6368282 0
cvc5 0 00.00.0100100 0
cvc5-lfsc 0 00.00.0100100 0

n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.