The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the BVFPLRA logic in the Unsat Core Track.
Page generated on 2023-07-06 16:05:43 +0000
Benchmarks: 11 Time Limit: 1200 seconds Memory Limit: 60 GB
Sequential Performance | Parallel Performance |
---|---|
Bitwuzla | Bitwuzla |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Timeout | Memout |
---|---|---|---|---|---|---|
Bitwuzla Fixedn | 0 | 50 | 4.094 | 4.094 | 0 | 0 |
Bitwuzla | 0 | 50 | 4.115 | 4.116 | 0 | 0 |
2020-CVC4-ucn | 0 | 50 | 11.548 | 11.547 | 0 | 0 |
cvc5 | 0 | 29 | 30.52 | 30.518 | 0 | 0 |
UltimateEliminator+MathSAT | 0 | 0 | 0.0 | 0.0 | 0 | 0 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Timeout | Memout |
---|---|---|---|---|---|---|
Bitwuzla Fixedn | 0 | 50 | 4.094 | 4.094 | 0 | 0 |
Bitwuzla | 0 | 50 | 4.115 | 4.116 | 0 | 0 |
2020-CVC4-ucn | 0 | 50 | 11.548 | 11.547 | 0 | 0 |
cvc5 | 0 | 29 | 30.52 | 30.518 | 0 | 0 |
UltimateEliminator+MathSAT | 0 | 0 | 0.0 | 0.0 | 0 | 0 |
n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.