The International Satisfiability Modulo Theories (SMT) Competition.
Home
Introduction
Benchmark Submission
Publications
SMT-LIB
Previous Editions
Competition results for the AUFNIRA logic in the Unsat Core Track.
Page generated on 2023-07-06 16:05:43 +0000
Benchmarks: 549 Time Limit: 1200 seconds Memory Limit: 60 GB
Sequential Performance | Parallel Performance |
---|---|
cvc5 | cvc5 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Timeout | Memout |
---|---|---|---|---|---|---|
2020-CVC4-ucn | 0 | 16763 | 165.863 | 142.804 | 32 | 0 |
cvc5 | 0 | 15932 | 976.037 | 975.962 | 33 | 0 |
Vampire | 0 | 2127 | 13.78 | 6.518 | 15 | 0 |
UltimateEliminator+MathSAT | 0 | 273 | 128.586 | 68.255 | 0 | 0 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Timeout | Memout |
---|---|---|---|---|---|---|
2020-CVC4-ucn | 0 | 16763 | 165.863 | 142.804 | 32 | 0 |
cvc5 | 0 | 15932 | 976.037 | 975.962 | 33 | 0 |
Vampire | 0 | 2127 | 13.78 | 6.518 | 10 | 0 |
UltimateEliminator+MathSAT | 0 | 273 | 128.586 | 68.255 | 0 | 0 |
n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.