SMT-COMP

The International Satisfiability Modulo Theories (SMT) Competition.

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SMT-COMP 2022

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QF_BVFPLRA (Proof Exhibition Track)

Competition results for the QF_BVFPLRA logic in the Proof Exhibition Track.

Page generated on 2022-08-10 11:19:33 +0000

Benchmarks: 52
Time Limit: 1200 seconds
Memory Limit: 60 GB

This track is experimental. Solvers are only ranked by performance, but no winner is selected.

Sequential Performance

Solver Error Score Correct Score CPU Time Score Wall Time ScoreUnsolvedTimeout Memout
cvc5-lfsc 0 16 43192.783 43203.5193636 0
cvc5 0 13 45767.256 45770.1783938 0

Parallel Performance

Solver Error Score Correct ScoreCPU Time ScoreWall Time ScoreUnsolvedTimeout Memout
cvc5-lfsc 0 1643201.62343201.6093636 0
cvc5 0 1345776.80645768.0583938 0

n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.