The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the AUFBVFP logic in the Proof Exhibition Track.
Page generated on 2022-08-10 11:19:33 +0000
Benchmarks: 24 Time Limit: 1200 seconds Memory Limit: 60 GB
This track is experimental. Solvers are only ranked by performance, but no winner is selected.
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Timeout | Memout |
---|---|---|---|---|---|---|---|
cvc5-lfsc | 0 | 2 | 15760.211 | 15763.636 | 22 | 12 | 1 |
cvc5 | 0 | 0 | 19019.047 | 19022.164 | 24 | 14 | 1 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Timeout | Memout |
---|---|---|---|---|---|---|---|
cvc5-lfsc | 0 | 2 | 15762.921 | 15762.936 | 22 | 12 | 1 |
cvc5 | 0 | 0 | 19021.317 | 19021.384 | 24 | 14 | 1 |
n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.