The International Satisfiability Modulo Theories (SMT) Competition.
Home
Introduction
Benchmark Submission
Publications
SMT-LIB
Previous Editions
Competition results for the QF_UFLIA logic in the Model Validation Track.
Page generated on 2021-07-18 17:31:50 +0000
Benchmarks: 300 Time Limit: 1200 seconds Memory Limit: 60 GB
Sequential Performance | Parallel Performance |
---|---|
Yices2 model-validation | Yices2 model-validation |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Timeout | Memout |
---|---|---|---|---|---|---|
Yices2 model-validation | 0 | 300 | 6.199 | 7.077 | 0 | 0 |
z3-mvn | 0 | 300 | 34.246 | 33.042 | 0 | 0 |
cvc5-mv | 0 | 300 | 190.793 | 190.687 | 0 | 0 |
SMTInterpol | 0 | 300 | 1312.714 | 632.188 | 0 | 0 |
MathSAT5n | 0 | 300 | 2125.409 | 2125.65 | 0 | 0 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Timeout | Memout |
---|---|---|---|---|---|---|
Yices2 model-validation | 0 | 300 | 6.199 | 7.077 | 0 | 0 |
z3-mvn | 0 | 300 | 34.246 | 33.042 | 0 | 0 |
cvc5-mv | 0 | 300 | 190.793 | 190.687 | 0 | 0 |
SMTInterpol | 0 | 300 | 1312.714 | 632.188 | 0 | 0 |
MathSAT5n | 0 | 300 | 2125.409 | 2125.65 | 0 | 0 |
n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.