The International Satisfiability Modulo Theories (SMT) Competition.
Home
Introduction
Benchmark Submission
Publications
SMT-LIB
Previous Editions
Competition results for the QF_UFLIA logic in the Incremental Track.
Page generated on 2021-07-18 17:30:28 +0000
Benchmarks: 386 Time Limit: 1200 seconds Memory Limit: 60 GB
Parallel Performance |
---|
Yices2 incremental |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Timeout | Memout |
---|---|---|---|---|---|---|---|
2018-Z3 (incremental)n | 0 | 490136 | 83353.769 | 83337.521 | 4958 | 62 | 0 |
z3n | 0 | 488841 | 86026.438 | 85982.112 | 6253 | 66 | 0 |
2020-z3n | 0 | 488661 | 86460.141 | 86423.276 | 6433 | 67 | 0 |
MathSAT5n | 0 | 486421 | 122284.659 | 122266.196 | 8673 | 99 | 0 |
Yices2 incremental | 0 | 485538 | 93879.949 | 93865.522 | 9556 | 73 | 0 |
SMTInterpol | 0 | 485222 | 120678.94 | 119331.101 | 9872 | 94 | 0 |
cvc5-inc | 0 | 484138 | 115219.541 | 115190.924 | 10956 | 87 | 0 |
n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.