The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the QF_LIA logic in the Incremental Track.
Page generated on 2021-07-18 17:30:28 +0000
Benchmarks: 69 Time Limit: 1200 seconds Memory Limit: 60 GB
| Parallel Performance |
|---|
| Yices2 incremental |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Timeout | Memout |
|---|---|---|---|---|---|---|---|
| Yices2 incremental | 0 | 20040333 | 32658.648 | 32143.399 | 881 | 20 | 0 |
| 2020-Yices2-fixed incrementaln | 0 | 20040331 | 32277.5 | 31765.378 | 883 | 20 | 0 |
| z3n | 0 | 19664650 | 52836.174 | 52265.011 | 376564 | 32 | 0 |
| MathSAT5n | 0 | 17407412 | 40936.744 | 40460.088 | 2633802 | 26 | 0 |
| SMTInterpol | 0 | 16702620 | 58238.615 | 55490.574 | 3338594 | 37 | 0 |
| cvc5-inc | 0 | 7389770 | 60927.573 | 60812.936 | 12651444 | 44 | 0 |
| OpenSMT | 0 | 593412 | 61481.403 | 62070.44 | 19447802 | 47 | 0 |
n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.