The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the BVFP logic in the Incremental Track.
Page generated on 2021-07-18 17:30:28 +0000
Benchmarks: 1 Time Limit: 1200 seconds Memory Limit: 60 GB
Parallel Performance |
---|
cvc5-inc |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Timeout | Memout |
---|---|---|---|---|---|---|---|
2019-CVC4-incn | 0 | 270 | 1200.0 | 1200.0 | 188 | 1 | 0 |
cvc5-inc | 0 | 253 | 1200.0 | 1200.0 | 205 | 1 | 0 |
UltimateEliminator+MathSAT | 0 | 231 | 50.67 | 44.062 | 227 | 0 | 0 |
n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.