The International Satisfiability Modulo Theories (SMT) Competition.
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Page generated on 2021-07-18 17:31:51 +0000
Sequential Performance | Parallel Performance |
---|---|
cvc5-mv | cvc5-mv |
Solver | Correct Score | Time Score | Division |
---|---|---|---|
SMTInterpol | 1.03642773 | 2.60795089 | QF_Equality+LinearArithe |
cvc5-mv | 1.02123894 | 0.89616907 | QF_LinearIntArith |
Yices2 model-validation | 1.00530973 | 1.43356631 | QF_LinearRealArith |
Bitwuzla | 1.00472813 | 1.42469613 | QF_Bitvec |
Yices2 model-validation | 1.0 | 7.60861338 | QF_Equalitye |
Yices2 model-validation | 1.0 | 1.19722232 | QF_Equality+Bitvece |
Solver | Correct Score | Time Score | Division |
---|---|---|---|
SMTInterpol | 1.03760282 | 3.01381443 | QF_Equality+LinearArithe |
cvc5-mv | 1.02123894 | 0.89617595 | QF_LinearIntArith |
Yices2 model-validation | 1.00530973 | 1.43432143 | QF_LinearRealArith |
Bitwuzla | 1.00472813 | 1.42885003 | QF_Bitvec |
Yices2 model-validation | 1.0 | 7.33060882 | QF_Equalitye |
Yices2 model-validation | 1.0 | 1.17738359 | QF_Equality+Bitvece |
n Non-competing.
e Experimental.