The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the UFLRA division in the Incremental Track.
Page generated on 2019-07-23 17:57:24 +0000
Benchmarks: 935 Time Limit: 2400 seconds Memory Limit: 60 GB
| Parallel Performance |
|---|
| CVC4-inc |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|
| Z3n | 0 | 442524 | 184738.544 | 184625.696 | 135020 | 16 | 0 | |
| CVC4-inc | 0 | 136172 | 37953.406 | 37868.679 | 441372 | 6 | 0 | |
| SMTInterpol | 0 | 103581 | 699622.68 | 694806.907 | 473963 | 245 | 0 | |
| 2018-Z3 (incremental)n | 0 | 40078 | 24381.39 | 24220.149 | 537466 | 0 | 0 | |
| UltimateEliminator+MathSAT-5.5.4 | 0 | 0 | 2810.235 | 1347.337 | 577544 | 0 | 0 | |
| UltimateEliminator+Yices-2.6.1 | 0 | 0 | 2812.8 | 1347.753 | 577544 | 0 | 0 | |
| UltimateEliminator+SMTInterpol | 0 | 0 | 2820.189 | 1355.27 | 577544 | 0 | 0 |
n Non-competing.
Abstained: Total of benchmarks in logics in this division that solver chose to abstain from. For SAT/UNSAT scores, this column also includes benchmarks not known to be SAT/UNSAT.