The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the QF_LIA division in the Incremental Track.
Page generated on 2019-07-23 17:57:24 +0000
Benchmarks: 69 Time Limit: 2400 seconds Memory Limit: 60 GB
| Parallel Performance |
|---|
| Yices 2.6.2 Incremental |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|
| 2018-Yices (incremental)n | 0 | 20040582 | 51875.963 | 51416.513 | 632 | 14 | 0 | |
| Yices 2.6.2 Incremental | 0 | 20040572 | 52785.18 | 52329.38 | 642 | 14 | 0 | |
| Z3n | 0 | 20039935 | 80948.221 | 80421.128 | 1279 | 24 | 0 | |
| SMTInterpol | 0 | 19927683 | 92010.063 | 89918.031 | 113531 | 28 | 0 | |
| CVC4-inc-fixedn | 0 | 12152396 | 108396.413 | 108217.908 | 7888818 | 39 | 0 | |
| CVC4-inc | 0 | 0 | 1.726 | 4.551 | 20041214 | 0 | 0 |
n Non-competing.
Abstained: Total of benchmarks in logics in this division that solver chose to abstain from. For SAT/UNSAT scores, this column also includes benchmarks not known to be SAT/UNSAT.