The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the UFNIA logic in the Incremental Track. Chart
Results were generated on 2026-07-25
Benchmarks: 806
Time Limit: 1200 seconds
Memory Limit: 30720 GB
| Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
|---|---|---|---|
| cvc5 | - | - | cvc5 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|
| cvc5 | 0 | 14881 | 277207.42 | 277221.26 | 0 | 806 | 0 | 353 | 0 |
| SMTInterpol | 0 | 7105 | 755770.44 | 587325.34 | 0 | 806 | 0 | 533 | 0 |
| z3-BooledASS ne | 0 | 0 (base +0) | 4.88 | 6.23 | 0 | 806 | 0 | 0 | 0 |
| UltimateEliminator+MathSAT | 0 | 0 | 3022.65 | 1120.90 | 0 | 806 | 0 | 0 | 0 |
| z3-BooledASS-base n | 0 | 0 | 0.00 | 0.00 | 0 | 806 | 0 | 0 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|
| cvc5 | 0 | 10770 | 1368.78 | 1368.78 | 0 | 506 | 300 | 120 | 0 |
| SMTInterpol | 0 | 3979 | 394.61 | 394.61 | 0 | 155 | 651 | 48 | 0 |
| z3-BooledASS ne | 0 | 0 (base +0) | 4.88 | 6.23 | 0 | 806 | 0 | 0 | 0 |
| UltimateEliminator+MathSAT | 0 | 0 | 3022.65 | 1120.90 | 0 | 806 | 0 | 0 | 0 |
| z3-BooledASS-base n | 0 | 0 | 0.00 | 0.00 | 0 | 806 | 0 | 0 | 0 |