The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the QF_UFNIA logic in the Model Validation Track. Chart
Results were generated on 2026-07-25
Benchmarks: 300
Time Limit: 1200 seconds
Memory Limit: 30720 GB
| Sequential Performance | Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
|---|---|---|---|---|
| Yices2 | Yices2 | Yices2 | - | Yices2 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| Yices2 | 0 | 230 | 1221.24 | 1250.24 | 230 | 230 | 70 | 0 | 6 | 0 |
| cvc5 | 0 | 207 | 2593.06 | 2618.69 | 207 | 207 | 93 | 0 | 46 | 0 |
| SMTInterpol | 0 | 125 | 9430.10 | 8555.13 | 125 | 125 | 175 | 0 | 2 | 0 |
| z3-BooledASS ne | 0 | 45 (base +2) | 3835.38 | 3841.25 | 45 | 45 | 255 | 0 | 15 | 0 |
| z3-BooledASS-base n | 0 | 43 | 3632.22 | 3637.97 | 43 | 43 | 257 | 0 | 17 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| Yices2 | 0 | 230 | 1221.24 | 1250.24 | 230 | 230 | 70 | 0 | 6 | 0 |
| cvc5 | 0 | 207 | 2593.06 | 2618.69 | 207 | 207 | 93 | 0 | 46 | 0 |
| SMTInterpol | 0 | 125 | 9430.10 | 8555.13 | 125 | 125 | 175 | 0 | 2 | 0 |
| z3-BooledASS ne | 0 | 45 (base +2) | 3835.38 | 3841.25 | 45 | 45 | 255 | 0 | 15 | 0 |
| z3-BooledASS-base n | 0 | 43 | 3632.22 | 3637.97 | 43 | 43 | 257 | 0 | 17 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| Yices2 | 0 | 230 | 1221.24 | 1250.24 | 230 | 230 | 70 | 0 | 6 | 0 |
| cvc5 | 0 | 207 | 2593.06 | 2618.69 | 207 | 207 | 93 | 0 | 46 | 0 |
| SMTInterpol | 0 | 125 | 9430.10 | 8555.13 | 125 | 125 | 175 | 0 | 2 | 0 |
| z3-BooledASS ne | 0 | 45 (base +2) | 3835.38 | 3841.25 | 45 | 45 | 255 | 0 | 15 | 0 |
| z3-BooledASS-base n | 0 | 43 | 3632.22 | 3637.97 | 43 | 43 | 257 | 0 | 17 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| Yices2 | 0 | 217 | 215.19 | 242.43 | 217 | 217 | 63 | 20 | 0 | 0 |
| cvc5 | 0 | 196 | 156.28 | 180.38 | 196 | 196 | 45 | 59 | 0 | 0 |
| SMTInterpol | 0 | 93 | 172.43 | 98.43 | 93 | 93 | 163 | 44 | 0 | 0 |
| z3-BooledASS ne | 0 | 32 (base +2) | 278.60 | 282.58 | 32 | 32 | 238 | 30 | 0 | 0 |
| z3-BooledASS-base n | 0 | 30 | 237.44 | 241.26 | 30 | 30 | 238 | 32 | 0 | 0 |