The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the QF_UFNIA logic in the Incremental Track. Chart
Results were generated on 2026-07-25
Benchmarks: 501
Time Limit: 1200 seconds
Memory Limit: 30720 GB
| Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
|---|---|---|---|
| cvc5 | - | - | SMTInterpol |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|
| cvc5 | 0 | 97954 | 8684.26 | 8684.34 | 0 | 501 | 0 | 5 | 0 |
| SMTInterpol | 0 | 96854 | 563.29 | 563.29 | 0 | 501 | 0 | 0 | 0 |
| Yices2 | 0 | 35532 | 2423.38 | 2423.38 | 0 | 501 | 0 | 8 | 0 |
| z3-BooledASS ne | 0 | 0 (base +0) | 3.03 | 3.85 | 0 | 501 | 0 | 0 | 0 |
| z3-BooledASS-base n | 0 | 0 | 0.00 | 0.00 | 0 | 501 | 0 | 0 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|
| SMTInterpol | 0 | 12281 | 495.97 | 495.97 | 0 | 500 | 1 | 0 | 0 |
| Yices2 | 0 | 11856 | 368.09 | 368.09 | 0 | 484 | 17 | 6 | 0 |
| cvc5 | 0 | 9618 | 955.39 | 955.39 | 0 | 458 | 43 | 4 | 0 |
| z3-BooledASS ne | 0 | 0 (base +0) | 3.03 | 3.85 | 0 | 501 | 0 | 0 | 0 |
| z3-BooledASS-base n | 0 | 0 | 0.00 | 0.00 | 0 | 501 | 0 | 0 | 0 |