The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the QF_UFLIA logic in the Incremental Track. Chart
Results were generated on 2026-07-25
Benchmarks: 386
Time Limit: 1200 seconds
Memory Limit: 30720 GB
| Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
|---|---|---|---|
| Yices2 | - | - | Yices2 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|
| Yices2 | 0 | 484405 | 66426.89 | 66426.89 | 0 | 386 | 0 | 69 | 0 |
| SMTInterpol | 0 | 482904 | 91511.14 | 91511.14 | 0 | 386 | 0 | 95 | 0 |
| cvc5 | 0 | 395339 | 95806.98 | 95806.98 | 0 | 386 | 0 | 77 | 0 |
| OpenSMT | 0 | 32385 | 99739.86 | 99739.86 | 0 | 386 | 0 | 85 | 0 |
| z3-BooledASS ne | 0 | 0 (base +0) | 2.30 | 2.93 | 0 | 386 | 0 | 0 | 0 |
| z3-BooledASS-base n | 0 | 0 | 0.00 | 0.00 | 0 | 386 | 0 | 0 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|
| Yices2 | 0 | 2923 | 32.39 | 32.39 | 0 | 297 | 89 | 0 | 0 |
| OpenSMT | 0 | 1133 | 202.21 | 202.21 | 0 | 275 | 111 | 0 | 0 |
| cvc5 | 0 | 863 | 65.92 | 65.92 | 0 | 280 | 106 | 0 | 0 |
| SMTInterpol | 0 | 810 | 199.64 | 199.64 | 0 | 278 | 108 | 0 | 0 |
| z3-BooledASS ne | 0 | 0 (base +0) | 2.30 | 2.93 | 0 | 386 | 0 | 0 | 0 |
| z3-BooledASS-base n | 0 | 0 | 0.00 | 0.00 | 0 | 386 | 0 | 0 | 0 |