QF_UFDTNIA (Model Validation Track)

Competition results for the QF_UFDTNIA logic in the Model Validation Track. Chart

Results were generated on 2026-07-25

Benchmarks: 47
Time Limit: 1200 seconds
Memory Limit: 30720 GB

Winners

Sequential Performance	Parallel Performance	SAT Performance (parallel)	UNSAT Performance (parallel)	24 seconds Performance (parallel)
cvc5	cvc5	cvc5	-	cvc5

Sequential Performance Performance

Solver	Correct Score	CPU Time Score	Wall Time Score	Solved	Solved SAT	Unsolved	Timeout
z3-BooledASS ^ne	42 (base +0)	3107.58	3113.19	42	42	5	4
cvc5	19	419.37	421.76	19	19	28	20
SMTInterpol	3	170.14	108.68	3	3	44	3
z3-BooledASS-base ⁿ	42	3134.36	3139.94	42	42	5	4

(base +/- n): for derived solvers: increment over base solver
^ne: not eligible for winning as it does not substantially improve over the base solver (at least 10 % improvement in PAR2 score) ⁿ: non-competing solver

Parallel Performance Performance

Solver	Correct Score	CPU Time Score	Wall Time Score	Solved	Solved SAT	Unsolved	Timeout
z3-BooledASS ^ne	42 (base +0)	3107.58	3113.19	42	42	5	4
cvc5	19	419.37	421.76	19	19	28	20
SMTInterpol	3	170.14	108.68	3	3	44	3
z3-BooledASS-base ⁿ	42	3134.36	3139.94	42	42	5	4

SAT Performance Performance

Solver	Correct Score	CPU Time Score	Wall Time Score	Solved	Solved SAT	Unsolved	Timeout
z3-BooledASS ^ne	42 (base +0)	3107.58	3113.19	42	42	5	4
cvc5	19	419.37	421.76	19	19	28	20
SMTInterpol	3	170.14	108.68	3	3	44	3
z3-BooledASS-base ⁿ	42	3134.36	3139.94	42	42	5	4

24 seconds Performance Performance

Solver	Correct Score	CPU Time Score	Wall Time Score	Solved	Solved SAT	Unsolved	Abstained
z3-BooledASS ^ne	36 (base +0)	127.73	132.23	36	36	1	10
cvc5	13	56.14	57.75	13	13	4	30
SMTInterpol	1	42.35	23.13	1	1	18	28
z3-BooledASS-base ⁿ	36	128.13	132.69	36	36	1	10

SMT-COMP 2026