QF_UFDTLIRA (Model Validation Track)

Competition results for the QF_UFDTLIRA logic in the Model Validation Track. Chart

Results were generated on 2026-07-25

Benchmarks: 80
Time Limit: 1200 seconds
Memory Limit: 30720 GB

Winners

Sequential Performance	Parallel Performance	SAT Performance (parallel)	UNSAT Performance (parallel)	24 seconds Performance (parallel)
cvc5	cvc5	cvc5	-	cvc5

Sequential Performance Performance

Solver	Correct Score	CPU Time Score	Wall Time Score	Solved	Solved SAT	Unsolved
cvc5	80	12.78	22.85	80	80	0
SMTInterpol	80	33.24	34.98	80	80	0
z3-BooledASS ^ne	0 (base +0)	0.00	0.00	0	0	80
z3-BooledASS-base ⁿ	0	0.00	0.00	0	0	80

(base +/- n): for derived solvers: increment over base solver
^ne: not eligible for winning as it does not substantially improve over the base solver (at least 10 % improvement in PAR2 score) ⁿ: non-competing solver

Parallel Performance Performance

Solver	Correct Score	CPU Time Score	Wall Time Score	Solved	Solved SAT	Unsolved
cvc5	80	12.78	22.85	80	80	0
SMTInterpol	80	33.24	34.98	80	80	0
z3-BooledASS ^ne	0 (base +0)	0.00	0.00	0	0	80
z3-BooledASS-base ⁿ	0	0.00	0.00	0	0	80

SAT Performance Performance

Solver	Correct Score	CPU Time Score	Wall Time Score	Solved	Solved SAT	Unsolved
cvc5	80	12.78	22.85	80	80	0
SMTInterpol	80	33.24	34.98	80	80	0
z3-BooledASS ^ne	0 (base +0)	0.00	0.00	0	0	80
z3-BooledASS-base ⁿ	0	0.00	0.00	0	0	80

24 seconds Performance Performance

Solver	Correct Score	CPU Time Score	Wall Time Score	Solved	Solved SAT	Unsolved
cvc5	80	12.78	22.85	80	80	0
SMTInterpol	80	33.24	34.98	80	80	0
z3-BooledASS ^ne	0 (base +0)	0.00	0.00	0	0	80
z3-BooledASS-base ⁿ	0	0.00	0.00	0	0	80

SMT-COMP 2026