The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the QF_NonLinearRealArith division in the Model Validation Track. Chart
Results were generated on 2026-07-25
Benchmarks: 936
Time Limit: 1200 seconds
Memory Limit: 30720 GB
| Sequential Performance | Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
|---|---|---|---|---|
| SMT-RAT | SMT-RAT | SMT-RAT | - | Yices2 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| z3-BooledASS ne | 0 | 743 (base +0) | 1433.41 | 1524.95 | 743 | 743 | 193 | 0 | 28 | 0 |
| SMT-RAT | 0 | 722 | 7209.81 | 7299.79 | 722 | 722 | 214 | 0 | 49 | 0 |
| Yices2 | 0 | 720 | 3897.74 | 3988.35 | 720 | 720 | 216 | 0 | 35 | 0 |
| cvc5 | 0 | 693 | 3914.34 | 4000.92 | 693 | 693 | 243 | 0 | 56 | 0 |
| SMTInterpol | 0 | 3 | 897.35 | 822.86 | 3 | 3 | 933 | 0 | 0 | 0 |
| z3-BooledASS-base n | 0 | 743 | 1433.52 | 1524.82 | 743 | 743 | 193 | 0 | 28 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| z3-BooledASS ne | 0 | 743 (base +0) | 1433.41 | 1524.95 | 743 | 743 | 193 | 0 | 28 | 0 |
| SMT-RAT | 0 | 722 | 7209.81 | 7299.79 | 722 | 722 | 214 | 0 | 49 | 0 |
| Yices2 | 0 | 720 | 3897.74 | 3988.35 | 720 | 720 | 216 | 0 | 35 | 0 |
| cvc5 | 0 | 693 | 3914.34 | 4000.92 | 693 | 693 | 243 | 0 | 56 | 0 |
| SMTInterpol | 0 | 3 | 897.35 | 822.86 | 3 | 3 | 933 | 0 | 0 | 0 |
| z3-BooledASS-base n | 0 | 743 | 1433.52 | 1524.82 | 743 | 743 | 193 | 0 | 28 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| z3-BooledASS ne | 0 | 743 (base +0) | 1433.41 | 1524.95 | 743 | 743 | 193 | 0 | 28 | 0 |
| SMT-RAT | 0 | 722 | 7209.81 | 7299.79 | 722 | 722 | 214 | 0 | 49 | 0 |
| Yices2 | 0 | 720 | 3897.74 | 3988.35 | 720 | 720 | 216 | 0 | 35 | 0 |
| cvc5 | 0 | 693 | 3914.34 | 4000.92 | 693 | 693 | 243 | 0 | 56 | 0 |
| SMTInterpol | 0 | 3 | 897.35 | 822.86 | 3 | 3 | 933 | 0 | 0 | 0 |
| z3-BooledASS-base n | 0 | 743 | 1433.52 | 1524.82 | 743 | 743 | 193 | 0 | 28 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| z3-BooledASS ne | 0 | 731 (base +0) | 361.06 | 451.00 | 731 | 731 | 164 | 41 | 0 | 0 |
| Yices2 | 0 | 709 | 221.49 | 310.37 | 709 | 709 | 181 | 46 | 0 | 0 |
| SMT-RAT | 0 | 700 | 189.24 | 275.89 | 700 | 700 | 164 | 72 | 0 | 0 |
| cvc5 | 0 | 688 | 161.80 | 247.49 | 688 | 688 | 185 | 63 | 0 | 0 |
| SMTInterpol | 0 | 1 | 0.39 | 0.41 | 1 | 1 | 931 | 4 | 0 | 0 |
| z3-BooledASS-base n | 0 | 731 | 361.47 | 451.22 | 731 | 731 | 164 | 41 | 0 | 0 |