The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the QF_NIA logic in the Model Validation Track. Chart
Results were generated on 2026-07-25
Benchmarks: 1901
Time Limit: 1200 seconds
Memory Limit: 30720 GB
| Sequential Performance | Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
|---|---|---|---|---|
| Yices2 | Yices2 | Yices2 | - | Yices2 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| Yices2 | 0 | 1686 | 15376.89 | 15588.15 | 1686 | 1686 | 215 | 0 | 206 | 0 |
| cvc5 | 0 | 1590 | 395345.60 | 395582.42 | 1590 | 1590 | 311 | 0 | 302 | 0 |
| z3-BooledASS ne | 0 | 1046 (base -646) | 38440.52 | 38573.30 | 1046 | 1046 | 855 | 0 | 194 | 0 |
| SMTInterpol | 0 | 1 | 0.42 | 0.43 | 1 | 1 | 1900 | 0 | 2 | 0 |
| z3-BooledASS-base n | 0 | 1692 | 44277.81 | 44490.51 | 1692 | 1692 | 209 | 0 | 190 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| Yices2 | 0 | 1686 | 15376.89 | 15588.15 | 1686 | 1686 | 215 | 0 | 206 | 0 |
| cvc5 | 0 | 1590 | 395345.60 | 395582.42 | 1590 | 1590 | 311 | 0 | 302 | 0 |
| z3-BooledASS ne | 0 | 1046 (base -646) | 38440.52 | 38573.30 | 1046 | 1046 | 855 | 0 | 194 | 0 |
| SMTInterpol | 0 | 1 | 0.42 | 0.43 | 1 | 1 | 1900 | 0 | 2 | 0 |
| z3-BooledASS-base n | 0 | 1692 | 44277.81 | 44490.51 | 1692 | 1692 | 209 | 0 | 190 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| Yices2 | 0 | 1686 | 15376.89 | 15588.15 | 1686 | 1686 | 215 | 0 | 206 | 0 |
| cvc5 | 0 | 1590 | 395345.60 | 395582.42 | 1590 | 1590 | 311 | 0 | 302 | 0 |
| z3-BooledASS ne | 0 | 1046 (base -646) | 38440.52 | 38573.30 | 1046 | 1046 | 855 | 0 | 194 | 0 |
| SMTInterpol | 0 | 1 | 0.42 | 0.43 | 1 | 1 | 1900 | 0 | 2 | 0 |
| z3-BooledASS-base n | 0 | 1692 | 44277.81 | 44490.51 | 1692 | 1692 | 209 | 0 | 190 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| Yices2 | 0 | 1604 | 3266.57 | 3466.38 | 1604 | 1604 | 9 | 288 | 0 | 0 |
| z3-BooledASS ne | 0 | 866 (base -615) | 3222.67 | 3329.85 | 866 | 866 | 625 | 410 | 0 | 0 |
| cvc5 | 0 | 761 | 1729.64 | 1823.93 | 761 | 761 | 9 | 1131 | 0 | 0 |
| SMTInterpol | 0 | 1 | 0.42 | 0.43 | 1 | 1 | 1888 | 12 | 0 | 0 |
| z3-BooledASS-base n | 0 | 1481 | 4465.76 | 4648.43 | 1481 | 1481 | 16 | 404 | 0 | 0 |