SMT-COMP 2026

The International Satisfiability Modulo Theories (SMT) Competition.

GitHub

SMT-COMP 2026

QF_Equality_Bitvec_Arith (Incremental Track)

Competition results for the QF_Equality_Bitvec_Arith division in the Incremental Track. Chart

Results were generated on 2026-07-25

Benchmarks: 1027
Time Limit: 1200 seconds
Memory Limit: 30720 GB

Logics:

Winners

Parallel PerformanceSAT Performance (parallel)UNSAT Performance (parallel)24 seconds Performance (parallel)
Yices2--Yices2

Parallel Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedUnsolvedAbstainedTimeoutMemout
Yices20169467013.737012.1201027050
SMTInterpol01690694245.6992666.37010270440
cvc501689092415.4992403.16010270661
z3-BooledASS ne00
(base +0)		6.217.9101027000
z3-BooledASS-base n000.000.0001027000
(base +/- n): for derived solvers: increment over base solver
ne: not eligible for winning as it does not substantially improve over the base solver (at least 10 % improvement in PAR2 score) n: non-competing solver

24 seconds Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedUnsolvedAbstainedTimeoutMemout
Yices2016709966.51965.90010081910
cvc50152421636.281636.28085617160
SMTInterpol0126833204.543204.54082020710
z3-BooledASS ne00
(base +0)		6.217.9101027000
z3-BooledASS-base n000.000.0001027000
(base +/- n): for derived solvers: increment over base solver
ne: not eligible for winning as it does not substantially improve over the base solver (at least 10 % improvement in PAR2 score) n: non-competing solver