SMT-COMP 2026

The International Satisfiability Modulo Theories (SMT) Competition.

GitHub

SMT-COMP 2026

QF_Equality_Bitvec (Incremental Track)

Competition results for the QF_Equality_Bitvec division in the Incremental Track. Chart

Results were generated on 2026-07-25

Benchmarks: 1191
Time Limit: 1200 seconds
Memory Limit: 30720 GB

Logics:

Winners

Parallel PerformanceSAT Performance (parallel)UNSAT Performance (parallel)24 seconds Performance (parallel)
Bitwuzla--Yices2

Parallel Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedUnsolvedAbstainedTimeoutMemout
Bitwuzla0396821142.9621142.3301191080
Yices20392810711.5310711.58011910180
cvc503209191206.64191187.400119101714
SMTInterpol02133280977.21275377.100119101610
z3-BooledASS ne00
(base +0)		7.279.2901191000
z3-BooledASS-base n000.000.0001191000
(base +/- n): for derived solvers: increment over base solver
ne: not eligible for winning as it does not substantially improve over the base solver (at least 10 % improvement in PAR2 score) n: non-competing solver

24 seconds Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedUnsolvedAbstainedTimeoutMemout
Yices202543534.66534.66011583360
Bitwuzla02384983.64983.64011306100
cvc5019511663.041663.04098520670
SMTInterpol011543074.353074.350615576150
z3-BooledASS ne00
(base +0)		7.279.2901191000
z3-BooledASS-base n000.000.0001191000
(base +/- n): for derived solvers: increment over base solver
ne: not eligible for winning as it does not substantially improve over the base solver (at least 10 % improvement in PAR2 score) n: non-competing solver