QF_AUFLIA (Model Validation Track)

Competition results for the QF_AUFLIA logic in the Model Validation Track. Chart

Results were generated on 2026-07-25

Benchmarks: 300
Time Limit: 1200 seconds
Memory Limit: 30720 GB

Winners

Sequential Performance	Parallel Performance	SAT Performance (parallel)	UNSAT Performance (parallel)	24 seconds Performance (parallel)
Yices2	Yices2	Yices2	-	Yices2

Sequential Performance Performance

Solver	Correct Score	CPU Time Score	Wall Time Score	Solved	Solved SAT	Unsolved
Yices2	300	49.95	87.00	300	300	0
cvc5	300	135.86	173.09	300	300	0
SMTInterpol	300	308.61	190.12	300	300	0
z3-BooledASS ^ne	291 (base +0)	52.94	88.49	291	291	9
z3-BooledASS-base ⁿ	291	53.56	89.36	291	291	9

(base +/- n): for derived solvers: increment over base solver
^ne: not eligible for winning as it does not substantially improve over the base solver (at least 10 % improvement in PAR2 score) ⁿ: non-competing solver

Parallel Performance Performance

Solver	Correct Score	CPU Time Score	Wall Time Score	Solved	Solved SAT	Unsolved
Yices2	300	49.95	87.00	300	300	0
cvc5	300	135.86	173.09	300	300	0
SMTInterpol	300	308.61	190.12	300	300	0
z3-BooledASS ^ne	291 (base +0)	52.94	88.49	291	291	9
z3-BooledASS-base ⁿ	291	53.56	89.36	291	291	9

SAT Performance Performance

Solver	Correct Score	CPU Time Score	Wall Time Score	Solved	Solved SAT	Unsolved
Yices2	300	49.95	87.00	300	300	0
cvc5	300	135.86	173.09	300	300	0
SMTInterpol	300	308.61	190.12	300	300	0
z3-BooledASS ^ne	291 (base +0)	52.94	88.49	291	291	9
z3-BooledASS-base ⁿ	291	53.56	89.36	291	291	9

24 seconds Performance Performance

Solver	Correct Score	CPU Time Score	Wall Time Score	Solved	Solved SAT	Unsolved
Yices2	300	49.95	87.00	300	300	0
cvc5	300	135.86	173.09	300	300	0
SMTInterpol	300	308.61	190.12	300	300	0
z3-BooledASS ^ne	291 (base +0)	52.94	88.49	291	291	9
z3-BooledASS-base ⁿ	291	53.56	89.36	291	291	9

SMT-COMP 2026