The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the QF_AUFLIA logic in the Incremental Track. Chart
Results were generated on 2026-07-25
Benchmarks: 72
Time Limit: 1200 seconds
Memory Limit: 30720 GB
| Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
|---|---|---|---|
| cvc5 | - | - | Yices2 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|
| cvc5 | 0 | 3676694 | 19573.08 | 19573.08 | 0 | 72 | 0 | 9 | 0 |
| SMTInterpol | 0 | 3527203 | 20334.29 | 20334.29 | 0 | 72 | 0 | 14 | 0 |
| Yices2 | 0 | 2897326 | 1604.28 | 1604.28 | 0 | 72 | 0 | 0 | 0 |
| OpenSMT | 0 | 292154 | 5906.73 | 5906.73 | 0 | 72 | 0 | 4 | 0 |
| z3-BooledASS ne | 0 | 0 (base +0) | 0.43 | 0.55 | 0 | 72 | 0 | 0 | 0 |
| z3-BooledASS-base n | 0 | 0 | 0.00 | 0.00 | 0 | 72 | 0 | 0 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|
| Yices2 | 0 | 250585 | 113.35 | 113.35 | 0 | 57 | 15 | 0 | 0 |
| cvc5 | 0 | 51050 | 93.65 | 93.65 | 0 | 46 | 26 | 3 | 0 |
| SMTInterpol | 0 | 44225 | 181.56 | 181.56 | 0 | 47 | 25 | 0 | 0 |
| OpenSMT | 0 | 27318 | 58.16 | 58.16 | 0 | 64 | 8 | 0 | 0 |
| z3-BooledASS ne | 0 | 0 (base +0) | 0.43 | 0.55 | 0 | 72 | 0 | 0 | 0 |
| z3-BooledASS-base n | 0 | 0 | 0.00 | 0.00 | 0 | 72 | 0 | 0 | 0 |