The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the QF_AUFBVNIA logic in the Incremental Track. Chart
Results were generated on 2026-07-25
Benchmarks: 44
Time Limit: 1200 seconds
Memory Limit: 30720 GB
| Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
|---|---|---|---|
| cvc5 | - | - | Yices2 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|
| cvc5 | 0 | 64 | 17629.00 | 17627.57 | 0 | 44 | 0 | 12 | 0 |
| SMTInterpol | 0 | 30 | 16767.30 | 16485.36 | 0 | 44 | 0 | 8 | 0 |
| Yices2 | 0 | 29 | 6.05 | 5.44 | 0 | 44 | 0 | 0 | 0 |
| z3-BooledASS ne | 0 | 0 (base +0) | 0.28 | 0.35 | 0 | 44 | 0 | 0 | 0 |
| z3-BooledASS-base n | 0 | 0 | 0.00 | 0.00 | 0 | 44 | 0 | 0 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|
| Yices2 | 0 | 29 | 6.05 | 5.44 | 0 | 44 | 0 | 0 | 0 |
| cvc5 | 0 | 29 | 80.02 | 80.02 | 0 | 17 | 27 | 0 | 0 |
| SMTInterpol | 0 | 14 | 121.23 | 121.23 | 0 | 20 | 24 | 0 | 0 |
| z3-BooledASS ne | 0 | 0 (base +0) | 0.28 | 0.35 | 0 | 44 | 0 | 0 | 0 |
| z3-BooledASS-base n | 0 | 0 | 0.00 | 0.00 | 0 | 44 | 0 | 0 | 0 |