The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the QF_ALIA logic in the Incremental Track. Chart
Results were generated on 2026-07-25
Benchmarks: 44
Time Limit: 1200 seconds
Memory Limit: 30720 GB
| Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
|---|---|---|---|
| cvc5 | - | - | Yices2 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|
| cvc5 | 0 | 530398 | 1539.45 | 1539.45 | 0 | 44 | 0 | 0 | 0 |
| SMTInterpol | 0 | 530398 | 5549.18 | 5549.18 | 0 | 44 | 0 | 0 | 0 |
| Yices2 | 0 | 530382 | 318.26 | 318.26 | 0 | 44 | 0 | 1 | 0 |
| OpenSMT | 0 | 110060 | 51269.17 | 51269.17 | 0 | 44 | 0 | 41 | 0 |
| z3-BooledASS ne | 0 | 0 (base +0) | 0.26 | 0.33 | 0 | 44 | 0 | 0 | 0 |
| z3-BooledASS-base n | 0 | 0 | 0.00 | 0.00 | 0 | 44 | 0 | 0 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|
| Yices2 | 0 | 305040 | 72.55 | 72.55 | 0 | 38 | 6 | 0 | 0 |
| SMTInterpol | 0 | 271617 | 621.91 | 621.91 | 0 | 36 | 8 | 0 | 0 |
| cvc5 | 0 | 266439 | 348.07 | 348.07 | 0 | 36 | 8 | 0 | 0 |
| z3-BooledASS ne | 0 | 0 (base +0) | 0.26 | 0.33 | 0 | 44 | 0 | 0 | 0 |
| z3-BooledASS-base n | 0 | 0 | 0.00 | 0.00 | 0 | 44 | 0 | 0 | 0 |