SMT-COMP 2026

The International Satisfiability Modulo Theories (SMT) Competition.

GitHub

SMT-COMP 2026

LRA (Incremental Track)

Competition results for the LRA logic in the Incremental Track. Chart

Results were generated on 2026-07-25

Benchmarks: 5
Time Limit: 1200 seconds
Memory Limit: 30720 GB

Winners

Parallel PerformanceSAT Performance (parallel)UNSAT Performance (parallel)24 seconds Performance (parallel)
cvc5--SMTInterpol

Parallel Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedUnsolvedAbstainedTimeoutMemout
cvc501596966.2666.2605000
UltimateEliminator+MathSAT015969113.93113.9305000
SMTInterpol0127361220.901220.9005010
z3-BooledASS ne00
(base +0)		0.030.0405000
z3-BooledASS-base n000.000.0005000
(base +/- n): for derived solvers: increment over base solver
ne: not eligible for winning as it does not substantially improve over the base solver (at least 10 % improvement in PAR2 score) n: non-competing solver

24 seconds Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedUnsolvedAbstainedTimeoutMemout
SMTInterpol01201523.1423.1404100
cvc50744311.6111.6104100
UltimateEliminator+MathSAT0404623.9723.9703200
z3-BooledASS ne00
(base +0)		0.030.0405000
z3-BooledASS-base n000.000.0005000
(base +/- n): for derived solvers: increment over base solver
ne: not eligible for winning as it does not substantially improve over the base solver (at least 10 % improvement in PAR2 score) n: non-competing solver