The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the AUFBVDTNIRA logic in the Unsat Core Track. Chart
Results were generated on 2026-07-25
Benchmarks: 879
Time Limit: 1200 seconds
Memory Limit: 30720 GB
| Sequential Performance | Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
|---|---|---|---|---|
| SMTInterpol | SMTInterpol | - | SMTInterpol | cvc5 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| SMTInterpol | 0 | 55204 | 6365.26 | 4219.27 | 506 | 506 | 373 | 0 | 363 | 0 |
| cvc5 | 0 | 49749 | 245.83 | 309.16 | 513 | 513 | 366 | 0 | 361 | 0 |
| z3-BooledASS ne | 0 | 2504 (base -41538) | 182.00 | 185.25 | 26 | 26 | 853 | 0 | 386 | 0 |
| z3-BooledASS-base n | 0 | 44042 | 1484.98 | 1547.35 | 506 | 506 | 373 | 0 | 223 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| SMTInterpol | 0 | 55204 | 6365.26 | 4219.27 | 506 | 506 | 373 | 0 | 363 | 0 |
| cvc5 | 0 | 49749 | 245.83 | 309.16 | 513 | 513 | 366 | 0 | 361 | 0 |
| z3-BooledASS ne | 0 | 2504 (base -41538) | 182.00 | 185.25 | 26 | 26 | 853 | 0 | 386 | 0 |
| z3-BooledASS-base n | 0 | 44042 | 1484.98 | 1547.35 | 506 | 506 | 373 | 0 | 223 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| SMTInterpol | 0 | 55204 | 6365.26 | 4219.27 | 506 | 506 | 373 | 0 | 363 | 0 |
| cvc5 | 0 | 49749 | 245.83 | 309.16 | 513 | 513 | 366 | 0 | 361 | 0 |
| z3-BooledASS ne | 0 | 2504 (base -41538) | 182.00 | 185.25 | 26 | 26 | 853 | 0 | 386 | 0 |
| z3-BooledASS-base n | 0 | 44042 | 1484.98 | 1547.35 | 506 | 506 | 373 | 0 | 223 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|
| cvc5 | 0 | 49555 | 144.53 | 207.72 | 512 | 512 | 4 | 363 | 0 | 0 |
| SMTInterpol | 0 | 49137 | 2576.64 | 1060.05 | 479 | 479 | 6 | 394 | 0 | 0 |
| z3-BooledASS ne | 0 | 2351 (base -41225) | 51.59 | 54.56 | 24 | 24 | 450 | 405 | 0 | 0 |
| z3-BooledASS-base n | 0 | 43576 | 188.75 | 250.45 | 502 | 502 | 87 | 290 | 0 | 0 |