SMT-COMP 2024

The International Satisfiability Modulo Theories (SMT) Competition.

GitHub

SMT-COMP 2024

UFDTLIA (Unsat Core Track)

Competition results for the UFDTLIA logic in the Unsat Core Track.

Results were generated on 2024-07-08

Benchmarks: 59
Time Limit: 1200 seconds
Memory Limit: 20480 GB

Winners

winner_seqwinner_parwinner_satwinner_unsatwinner_24s
cvc5SMTInterpol-SMTInterpolcvc5

Sequential Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATSolved UNSATUnsolvedAbstainedTimeoutMemout
cvc505741849.6995491854.62678147047120120
SMTInterpol03083262.6166082861.96115437037220210

Parallel Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATSolved UNSATUnsolvedAbstainedTimeoutMemout
SMTInterpol093634149.32017128847.92825737037220210
cvc5084916261.95612716275.33395247047120120

UNSAT Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATSolved UNSATUnsolvedAbstainedTimeoutMemout
SMTInterpol072719967.01831418485.45015437037139130
cvc506405452.9752295459.809419470473930

24 seconds Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATSolved UNSATUnsolvedAbstainedTimeoutMemout
cvc5027014.3816718.0811733703702200
SMTInterpol0176191.51127787.5572652802803100