SMT-COMP 2024

The International Satisfiability Modulo Theories (SMT) Competition.

GitHub

SMT-COMP 2024

QF_UFLRA (Model Validation Track)

Competition results for the QF_UFLRA logic in the Model Validation Track.

Results were generated on 2024-07-08

Benchmarks: 385
Time Limit: 1200 seconds
Memory Limit: 20480 GB

Winners

Sequential PerformanceParallel PerformanceSAT Performance (parallel)UNSAT Performance (parallel)24 seconds Performance (parallel)
Yices2Yices2Yices2-Yices2

Sequential Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATSolved UNSATUnsolvedAbstainedTimeoutMemout
Yices20384292.209233330.75979338438401010
SMTInterpol03842777.6379011148.22094938438401010
cvc503831817.4301681856.11310338338302020
OpenSMT03811909.7542181948.48222638138104040

Parallel Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATSolved UNSATUnsolvedAbstainedTimeoutMemout
Yices20384292.209233330.75979338438401010
SMTInterpol03842777.6379011148.22094938438401010
cvc503831817.4301681856.11310338338302020
OpenSMT03811909.7542181948.48222638138104040

SAT Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATSolved UNSATUnsolvedAbstainedTimeoutMemout
Yices20384292.209233330.75979338438401010
SMTInterpol03842777.6379011148.22094938438401010
cvc503831817.4301681856.11310338338302020
OpenSMT03811909.7542181948.48222638138104040

24 seconds Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATSolved UNSATUnsolvedAbstainedTimeoutMemout
Yices2038380.254271118.62130938338300200
SMTInterpol03791176.74924465.92380237937900600
cvc50378123.855553161.66760737837800700
OpenSMT0374273.055783310.477362374374001100