The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the QF_UFLRA logic in the Incremental Track.
Results were generated on 2024-07-08
Benchmarks: 1529
Time Limit: 1200 seconds
Memory Limit: 20480 GB
Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
---|---|---|---|
cvc5 | - | - | Yices2 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
---|---|---|---|---|---|---|---|---|---|---|---|
cvc5 | 0 | 11543 | 37371.570956 | 37359.789958 | 0 | 0 | 0 | 1529 | 0 | 8 | 0 |
Yices2 | 0 | 11537 | 14793.425259 | 14835.124036 | 0 | 0 | 0 | 1529 | 0 | 4 | 0 |
OpenSMT | 0 | 11471 | 72675.994986 | 72677.774297 | 0 | 0 | 0 | 1529 | 0 | 29 | 0 |
SMTInterpol | 0 | 11400 | 110954.159613 | 62568.366618 | 0 | 0 | 0 | 1529 | 0 | 30 | 0 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
---|---|---|---|---|---|---|---|---|---|---|---|
Yices2 | 0 | 10573 | 1276.977862 | 1367.733056 | 0 | 0 | 0 | 1472 | 57 | 0 | 0 |
OpenSMT | 0 | 6503 | 1250.198262 | 1354.227404 | 0 | 0 | 0 | 1372 | 157 | 0 | 0 |
SMTInterpol | 0 | 6354 | 8711.634516 | 3396.975623 | 0 | 0 | 0 | 1390 | 139 | 0 | 0 |
cvc5 | 0 | 6329 | 2116.201671 | 2224.365075 | 0 | 0 | 0 | 1371 | 158 | 0 | 0 |