QF_UFDTLIRA (Model Validation Track)
Competition results for the QF_UFDTLIRA
logic
in the Model Validation Track.
Results were generated on 2024-07-08
Benchmarks: 80
Time Limit: 1200 seconds
Memory Limit: 20480 GB
Winners
| Sequential Performance | Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
|---|
| cvc5 | cvc5 | cvc5 | - | cvc5 |
Sequential Performance Performance
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|
| cvc5 | 0 | 80 | 10.856691 | 18.863113 | 80 | 80 | 0 | 0 | 0 | 0 | 0 |
| SMTInterpol | 0 | 80 | 33.142592 | 33.040691 | 80 | 80 | 0 | 0 | 0 | 0 | 0 |
Parallel Performance Performance
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|
| cvc5 | 0 | 80 | 10.856691 | 18.863113 | 80 | 80 | 0 | 0 | 0 | 0 | 0 |
| SMTInterpol | 0 | 80 | 33.142592 | 33.040691 | 80 | 80 | 0 | 0 | 0 | 0 | 0 |
SAT Performance Performance
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|
| cvc5 | 0 | 80 | 10.856691 | 18.863113 | 80 | 80 | 0 | 0 | 0 | 0 | 0 |
| SMTInterpol | 0 | 80 | 33.142592 | 33.040691 | 80 | 80 | 0 | 0 | 0 | 0 | 0 |
24 seconds Performance Performance
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|
| cvc5 | 0 | 80 | 10.856691 | 18.863113 | 80 | 80 | 0 | 0 | 0 | 0 | 0 |
| SMTInterpol | 0 | 80 | 33.142592 | 33.040691 | 80 | 80 | 0 | 0 | 0 | 0 | 0 |