SMT-COMP 2024

The International Satisfiability Modulo Theories (SMT) Competition.

GitHub

SMT-COMP 2024

QF_IDL (Model Validation Track)

Competition results for the QF_IDL logic in the Model Validation Track.

Results were generated on 2024-07-08

Benchmarks: 736
Time Limit: 1200 seconds
Memory Limit: 20480 GB

Winners

Sequential PerformanceParallel PerformanceSAT Performance (parallel)UNSAT Performance (parallel)24 seconds Performance (parallel)
Yices2Yices2Yices2-Yices2

Sequential Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATSolved UNSATUnsolvedAbstainedTimeoutMemout
Yices2065921444.42982521513.7053466596590770730
OpenSMT060239754.29119639825.357227602602013401340
cvc5057850702.46923450768.328615578578015801562
SMTInterpol045960058.75370850506.235285464464027202720

Parallel Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATSolved UNSATUnsolvedAbstainedTimeoutMemout
Yices2065921444.42982521513.7053466596590770730
OpenSMT060239754.29119639825.357227602602013401340
cvc5057850702.46923450768.328615578578015801562
SMTInterpol046468759.87443254187.535838464464027202720

SAT Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATSolved UNSATUnsolvedAbstainedTimeoutMemout
Yices2065921444.42982521513.7053466596590770730
OpenSMT060239754.29119639825.357227602602013401340
cvc5057850702.46923450768.328615578578015801562
SMTInterpol046468759.87443254187.535838464464027202720

24 seconds Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATSolved UNSATUnsolvedAbstainedTimeoutMemout
Yices20582866.357909924.6372875825820015400
OpenSMT03751410.2539721448.0404963753750036100
cvc503561417.884711453.6346363563560038000
SMTInterpol02823577.376021579.4726182822820045400