SMT-COMP 2024

The International Satisfiability Modulo Theories (SMT) Competition.

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SMT-COMP 2024

QF_Equality_Bitvec_Arith (Incremental Track)

Competition results for the QF_Equality_Bitvec_Arith division in the Incremental Track.

Results were generated on 2024-07-08

Benchmarks: 1046
Time Limit: 1200 seconds
Memory Limit: 20480 GB

Logics:

Winners

Parallel PerformanceSAT Performance (parallel)UNSAT Performance (parallel)24 seconds Performance (parallel)
Yices2--Yices2

Parallel Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATSolved UNSATUnsolvedAbstainedTimeoutMemout
Yices201580124656.61143424754.70490500010460150
cvc501572997292.93603797413.05265800010460591
SMTInterpol0681195826.449879179851.32091000104601220

24 seconds Performance Performance

SolverError ScoreCorrect ScoreCPU Time ScoreWall Time ScoreSolvedSolved SATSolved UNSATUnsolvedAbstainedTimeoutMemout
Yices20155881100.1401921188.79679500010024400
cvc50149881736.6727641814.42985200086717900
SMTInterpol04388783.9665893342.99546900079724900