The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the QF_BVLRA logic in the Incremental Track.
Results were generated on 2024-07-08
Benchmarks: 523
Time Limit: 1200 seconds
Memory Limit: 20480 GB
| Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
|---|---|---|---|
| Yices2 | - | - | Yices2 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|---|
| Yices2 | 0 | 14983 | 1783.635982 | 1832.358238 | 0 | 0 | 0 | 523 | 0 | 1 | 0 |
| cvc5 | 0 | 14954 | 7812.892672 | 7863.844785 | 0 | 0 | 0 | 523 | 0 | 4 | 0 |
| SMTInterpol | 0 | 0 | 9529.138785 | 4557.592956 | 0 | 0 | 0 | 523 | 0 | 0 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|---|
| Yices2 | 0 | 14832 | 304.781113 | 352.166667 | 0 | 0 | 0 | 519 | 4 | 0 | 0 |
| cvc5 | 0 | 14467 | 876.509059 | 922.319256 | 0 | 0 | 0 | 508 | 15 | 0 | 0 |
| SMTInterpol | 0 | 0 | 5200.106062 | 1976.924494 | 0 | 0 | 0 | 482 | 41 | 0 | 0 |