The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the QF_AUFBVLIA logic in the Incremental Track.
Results were generated on 2024-07-08
Benchmarks: 300
Time Limit: 1200 seconds
Memory Limit: 20480 GB
Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
---|---|---|---|
Yices2 | - | - | Yices2 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
---|---|---|---|---|---|---|---|---|---|---|---|
Yices2 | 0 | 539 | 14112.801118 | 14140.157048 | 0 | 0 | 0 | 300 | 0 | 10 | 0 |
cvc5 | 0 | 505 | 71058.6018 | 71101.474402 | 0 | 0 | 0 | 300 | 0 | 42 | 1 |
SMTInterpol | 0 | 444 | 159270.431146 | 150210.945468 | 0 | 0 | 0 | 300 | 0 | 105 | 0 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
---|---|---|---|---|---|---|---|---|---|---|---|
Yices2 | 0 | 496 | 644.563699 | 666.797991 | 0 | 0 | 0 | 273 | 27 | 0 | 0 |
cvc5 | 0 | 283 | 711.749207 | 726.035196 | 0 | 0 | 0 | 162 | 138 | 0 | 0 |
SMTInterpol | 0 | 218 | 2532.877275 | 976.6059 | 0 | 0 | 0 | 120 | 180 | 0 | 0 |