The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the QF_ALIA logic in the Incremental Track.
Results were generated on 2024-07-08
Benchmarks: 44
Time Limit: 1200 seconds
Memory Limit: 20480 GB
Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
---|---|---|---|
SMTInterpol | - | - | Yices2 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
---|---|---|---|---|---|---|---|---|---|---|---|
SMTInterpol | 0 | 530398 | 6412.063037 | 5416.283281 | 0 | 0 | 0 | 44 | 0 | 0 | 0 |
Yices2 | 0 | 530357 | 2691.350853 | 2663.179419 | 0 | 0 | 0 | 44 | 0 | 2 | 0 |
cvc5 | 0 | 526286 | 3753.732467 | 3739.001853 | 0 | 0 | 0 | 44 | 0 | 2 | 0 |
OpenSMT | 0 | 100802 | 52152.249244 | 52191.541838 | 0 | 0 | 0 | 44 | 0 | 42 | 0 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
---|---|---|---|---|---|---|---|---|---|---|---|
Yices2 | 0 | 296560 | 74.62433 | 71.101547 | 0 | 0 | 0 | 37 | 7 | 0 | 0 |
SMTInterpol | 0 | 267106 | 1214.504952 | 528.033028 | 0 | 0 | 0 | 35 | 9 | 0 | 0 |
cvc5 | 0 | 244744 | 324.409303 | 325.849738 | 0 | 0 | 0 | 34 | 10 | 0 | 0 |