The International Satisfiability Modulo Theories (SMT) Competition.
Competition results for the ALIA logic in the Incremental Track.
Results were generated on 2024-07-08
Benchmarks: 24
Time Limit: 1200 seconds
Memory Limit: 20480 GB
| Parallel Performance | SAT Performance (parallel) | UNSAT Performance (parallel) | 24 seconds Performance (parallel) |
|---|---|---|---|
| cvc5 | - | - | cvc5 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|---|
| cvc5 | 0 | 202550 | 245.747776 | 247.551259 | 0 | 0 | 0 | 24 | 0 | 0 | 0 |
| SMTInterpol | 0 | 202522 | 978.21206 | 486.33798 | 0 | 0 | 0 | 24 | 0 | 0 | 0 |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Solved | Solved SAT | Solved UNSAT | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|---|---|---|
| cvc5 | 0 | 188840 | 208.880883 | 210.722512 | 0 | 0 | 0 | 23 | 1 | 0 | 0 |
| SMTInterpol | 0 | 165072 | 762.933574 | 338.484029 | 0 | 0 | 0 | 21 | 3 | 0 | 0 |