SMT-COMP

The International Satisfiability Modulo Theories (SMT) Competition.

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SMT-COMP 2023

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Model Validation Track
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AUFDTNIRA (Parallel Track)

Competition results for the AUFDTNIRA logic in the Parallel Track.

Page generated on 2023-07-06 16:06:21 +0000

Benchmarks: 20
Time Limit: 1200 seconds
Memory Limit: N/A GB

This track is experimental. Solvers are only ranked by performance, but no winner is selected.

Parallel Performance

Solver Error Score Correct ScoreWall Time ScoreSolvedSolved SATSolved UNSATUnsolvedTimeout Memout
Vampire 0 183508.7981801820 0
iProver 0 16.15101190 0

SAT Performance

Solver Error Score Correct ScoreWall Time ScoreSolvedSolved SATSolved UNSATUnsolvedN/ATimeout Memout
Vampire 0 00.00000200 0
iProver 0 00.00000200 0

UNSAT Performance

Solver Error Score Correct ScoreWall Time ScoreSolvedSolved SATSolved UNSATUnsolvedN/ATimeout Memout
Vampire 0 183508.79818018020 0
iProver 0 16.151011720 0

24 seconds Performance

Solver Error Score Correct ScoreWall Time ScoreSolvedSolved SATSolved UNSATUnsolvedTimeout Memout
iProver 0 16.151011919 0
Vampire 0 00.00002020 0

n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.