The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the UFFPDTLIRA logic in the Unsat Core Track.
Page generated on 2021-07-18 17:31:25 +0000
Benchmarks: 291 Time Limit: 1200 seconds Memory Limit: 60 GB
Sequential Performance | Parallel Performance |
---|---|
cvc5-uc | cvc5-uc |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Timeout | Memout |
---|---|---|---|---|---|---|
cvc5-uc | 0 | 5497 | 2009.602 | 2009.86 | 1 | 0 |
2020-CVC4-ucn | 0 | 5483 | 1962.349 | 1963.474 | 1 | 0 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Timeout | Memout |
---|---|---|---|---|---|---|
cvc5-uc | 0 | 5497 | 2009.692 | 2009.81 | 1 | 0 |
2020-CVC4-ucn | 0 | 5483 | 1962.639 | 1963.394 | 1 | 0 |
n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.