The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the UFDT logic in the Unsat Core Track.
Page generated on 2021-07-18 17:31:25 +0000
Benchmarks: 931 Time Limit: 1200 seconds Memory Limit: 60 GB
Sequential Performance | Parallel Performance |
---|---|
cvc5-uc | Vampire |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Timeout | Memout |
---|---|---|---|---|---|---|
2020-CVC4-ucn | 0 | 302833 | 18765.182 | 18769.068 | 15 | 0 |
cvc5-uc | 0 | 295622 | 43764.827 | 43772.421 | 35 | 0 |
Vampire | 0 | 292489 | 45170.136 | 37737.637 | 29 | 0 |
Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Timeout | Memout |
---|---|---|---|---|---|---|
2020-CVC4-ucn | 0 | 302833 | 18768.882 | 18768.488 | 15 | 0 |
Vampire | 0 | 296715 | 64854.666 | 31920.789 | 17 | 0 |
cvc5-uc | 0 | 295622 | 43771.407 | 43770.481 | 35 | 0 |
n Non-competing.
N/A: Benchmarks not known to be SAT/UNSAT, respectively.