The International Satisfiability Modulo Theories (SMT) Competition.
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Competition results for the QF_Equality+Bitvec division in the Incremental Track.
Page generated on 2021-07-18 17:30:28 +0000
Benchmarks: 1832 Time Limit: 1200 seconds Memory Limit: 60 GB
Logics:| Parallel Performance |
|---|
| Yices2 incremental |
| Solver | Error Score | Correct Score | CPU Time Score | Wall Time Score | Unsolved | Abstained | Timeout | Memout |
|---|---|---|---|---|---|---|---|---|
| 2020-Yices2 incrementaln | 0 | 5619 | 34852.921 | 34786.52 | 53 | 0 | 22 | 0 |
| Yices2 incremental | 0 | 5619 | 35108.565 | 34988.725 | 53 | 0 | 22 | 0 |
| MathSAT5n | 0 | 5288 | 58964.652 | 58802.19 | 384 | 0 | 41 | 0 |
| Bitwuzla | 0 | 4798 | 50085.944 | 49989.19 | 874 | 0 | 27 | 0 |
| 2020-Bitwuzla-fixedn | 0 | 4796 | 51931.835 | 51866.675 | 876 | 0 | 29 | 0 |
| cvc5-inc | 0 | 4366 | 84569.252 | 84412.039 | 1306 | 0 | 58 | 0 |
| z3n | 0 | 3948 | 251969.341 | 251918.157 | 1724 | 0 | 188 | 1 |
n Non-competing.
Abstained: Total of benchmarks in logics in this division that solver chose to abstain from. For SAT/UNSAT scores, this column also includes benchmarks not known to be SAT/UNSAT.