SMT-COMP

The International Satisfiability Modulo Theories (SMT) Competition.

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SMT-COMP 2016

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UFIDL (Main Track)

Competition results for the UFIDL division as of Thu Jul 7 07:24:34 GMT

Benchmarks in this division: 68
Time Limit: 1200s

Winners

Sequential Performance Parallel Performance
CVC4 CVC4

Result table1

Sequential Performance

Solver Error Score Correct Score avg. CPU time
CVC4 0.000 62.486 29.340
vampire_smt_4.1 0.000 56.422 171.452
vampire_smt_4.1_parallel 0.000 56.422 409.034
veriT-dev 0.000 49.756 341.912
z3n 0.000 61.936 214.067

Parallel Performance

SolverError Score Correct Score avg. CPU time avg. WALL time Unsolved
CVC4 0.000 62.486 29.340 35.157 4
vampire_smt_4.1 0.000 56.422 171.452 170.616 6
vampire_smt_4.1_parallel 0.000 56.422 680.842 172.354 6
veriT-dev 0.000 49.756 342.027 342.062 10
z3n 0.000 61.936 214.182 214.070 2

n. Non-competitive.

1. Scores are computed according to Section 7 of the rules.